As it is well known, in the field of digital audio applications, data affected by noise originated from an optical fibre (POF) or a coaxial cable must be reconstructed. Data can be single-end or differential. To this purpose it is possible to use hysteresis comparators or Schmitt triggers, well known in the prior art.
By way of example, FIG. 1 shows a single-end hysteresis comparator 10 essentially comprising a positive-feedback operational amplifier 11.
In particular, the operational amplifier 11 has an inverting input terminal (−) receiving an input voltage signal Vi and an output terminal being feedback-connected, by means of a resistor R2, to a non-inverting input terminal (+) and effective to provide an output voltage signal Vo.
The non-inverting input terminal (+) is also connected to a voltage reference −Vdd by means of a further resistor R1. A voltage value V+ is then provided to this non-inverting input terminal (+), being equal to:V+=βV0  (1)being:V0 the voltage value on the output terminal of the operational amplifier 11; β a feedback coefficient equal to R1/(R1+R2).
It is also possible to optimize such an hysteresis comparator by means of a MOS configuration, schematically shown in FIG. 2 and globally indicated with 20. In particular the hysteresis comparator 20 is inserted between a supply voltage reference Vplus and a ground Vminus and it comprises a single-ended-configured Schmitt trigger 21 being cascade-connected to a buffer 22 between an input terminal IN and an output terminal TRIGGER.
In particular, the Schmitt trigger 21 comprises:
a first pair of PMOS transistors, M13 and M14, inserted, in series to each other, between the supply voltage reference Vplus and an inner circuit node triggNEG and having the control terminals connected to each other and to the input terminal IN of the hysteresis comparator 20;
a second pair of NMOS transistors, M17 and M18, inserted, in series to each other, between the inner circuit node triggNEG and the ground Vminus and having the control terminals connected to each other and to the input terminal IN of the hysteresis comparator 20;
a further PMOS transistor M12 inserted between an intermediate node X21 between the transistors M13 and M14 of the first pair of PMOS transistors and the ground Vminus; and
a further NMOS transistor M19 inserted between the supply voltage reference Vplus and an intermediate node X22 between the transistors M17 and M18 of the second pair of NMOS transistors.
Transistors M12 and M19 have respective control terminals connected to each other and to the inner circuit node triggNEG, as well as to the buffer 22.
In particular, the buffer 22 comprises a first M11 and a second M20 transistor, respectively of the PMOS and NMOS type, connected, in series to each other, between the supply voltage reference Vplus and the ground Vminus, and having the control terminals connected to the control terminals of the transistors M12 and M19 of the Schmitt trigger 21.
Finally, transistors M11 and M20 are connected to each other in correspondence of the output terminal TRIGGER of the hysteresis comparator 20.
The aim of known hysteresis comparators, whose transfer function is shown in FIG. 3, is essentially to avoid the comparison uncertainty when the input signal, with noise, crosses the switching threshold.
In particular, in the example shown in FIGS. 4 and 5, a input signal being monotonic at intervals is considered, to which a white noise having a predetermined variance is added. The additional white noise causes a repeated zero-crossing of the signal received by the hysteresis-free comparator generating a series of undesired switchings at the comparator output. These undesired switchings are removed by means of a traditional hysteresis comparator (as shown in FIGS. 1 and 2).
Moreover, although advantageous under several embodiments, known solutions have technological limitations penalizing the industry cost, for example not allowing the CMOS technology implementation thereof.
Moreover, as in the case of a traditional hysteresis comparator 20, it happens that, even though the comparator has good features in terms of speed, power consumption and noise rejection, it does not satisfy the following specifications generally required by the different applications:
it does not allow a signal with broad dynamics, for example from 200 mV to 10 Volts, to be directly interfaced by using a receiver implemented with a low supply voltage technology (<2.5V);
it is not compatible with the standards requiring different hysteresis values;
it does not reach a sufficiently high response speed with a reduced power consumption required by portable battery applications if an operational amplifier is used (such as for example in the configuration shown in FIG. 1);
it is not compatible with single-ended/differential input signals without performance lost.
The problems linked to the low supply voltages (traditionally <2.5V, but also 1.8V), as well as to the use of the devices in extremely variable voltage ranges, as well as with noise, are essentially unsolved.
In other words, the need for devices being capable of supporting ALL-INPUT signals, i.e. input signals of the single-ended type (for consumer applications) and of the differential type (for professional applications), is increasingly felt, with extremely variable voltage ranges (even higher than a supply voltage) and possibly affected by noises.
A technical problem underlying embodiments of the present invention is to provide an hysteresis comparator which can be integrated in low-cost technologies without external components, capable of reconstructing a datum originated from an ALL-INPUT signal in a “free” digital signal (and thus usable for example in DSP applications), having such structural and functional features as to overcome the limitations still affecting prior art devices.